Flash EEPROM memory arrays are being used for many purposes in present day digital systems (e.g., computers) because of the ability of flash EEPROM memory arrays to retain data when power is removed and to be easily reprogrammed without being removed from a system. A flash EEPROM memory array is comprised of floating gate field effect transistor devices arranged in row and column fashion. The charge stored on the floating gate of such a memory transistor may be changed by programming, and the state of the charge may be detected by sensing voltage across the device. Because these flash EEPROM arrays may be easily reprogrammed, they are being used as substitutes for normal EPROM arrays to provide read-only memory that may be easily updated.
A flash memory array is accessed for reading and writing in the same manner as are dynamic random access memory (DRAM) arrays using row and column addressing in byte, word, or larger sequences of bits. However, because of the manner in which data is stored, a flash memory array, unlike a typical DRAM device, cannot be overwritten without first erasing the memory cells. Flash memory arrays used as substitutes for EPROM arrays are typically erased in large blocks (that may constitute the entire array) before being reprogrammed.
Flash EEPROM memory arrays are also being used to provide smaller lighter functional equivalents of electromechanical hard disk drives. Flash memory arrays designed to replace hard disk drives (referred to herein as "flash disk drives") operate more reliably and are not as sensitive to physical damage as electro-mechanical hard disk drives. Because of these characteristics, flash disk drives are especially useful in portable computers where space is at a premium and weight is important.
Electro-mechanical disk drives have historically used an industry standard interface referred to as an "ATA interface." The ATA interface was specifically designed to provide communication between a computer system and a rotating electro-mechanical disk drive. Because of this, the ATA interface was defined in terms of primitive functions that are directly applicable to directly-overwritable, block read/write, rotating media. Such primitive functions include "do a slow seek for a logical address or a cylinder head sector," "read a sector or multiple sectors," and "write a sector."
On the other hand, exemplary flash EEPROM array primitive functions include "read and write at the byte, word, or small block level" and "erase at a large block level." The ATA interface does not communicate in flash memory array primitives. When a flash disk drive replaces an electro-mechanical disk drive, it uses the ATA interface to communicate with other computer components. Therefore, it has been necessary to provide circuitry by which the signals used by a computer to access electro-mechanical hard disk drives may be understood by the flash disk drive. The process of translating electro-mechanical rotating disk drive functions to flash disk drive functions has required a substantial amount of hardware and software.
For example, one type of flash disk drive uses a hardware device command user interface on the silicon substrate (chip) of each flash memory device that makes up the flash memory array to accomplish the row and column accesses necessary to operate the flash device. Each flash memory device command user interface typically includes state machines that receive commands from an external hardware flash disk drive command user interface interposed between the bus and the flash array. This external flash disk drive command user interface decodes the ATA rotating disk commands and generates commands adapted to carry out the purposes of the ATA commands within each flash memory device of the flash memory array. The flash disk drive command user interface controls the operations necessary to access the flash disk drive by sending the translated commands to the appropriate ones of the individual flash memory device command user interfaces.
Recently, there has appeared a lower cost alternative to a flash disk drive that combines disk emulation software running on a host computer with a low cost flash memory device array. The flash memory device array comprises one or more flash memory devices contained in one of several system packaging options, including a removable memory card, a system-resident single-in-line-memory module (SIMM), and a resident flash array (devices mounted directly on the system motherboard). The combination of any one of these plain flash memory device subsystems with disk emulation software is referred to in this specification as a flash disk emulator.
Many of the operations necessary for either a command user interface or a flash disk emulator to translate from commands phrased in primitives of a rotating disk are quite complicated. For example, in some flash disk drives and other flash storage devices, data is first written to empty blocks of the memory array chosen under control of the command user interface; and then the physical address at which the data is stored is recorded in lookup tables along with the rotating disk addresses provided externally. This allows the data to be recovered when the rotating addresses are provided.
Early flash memory arrays addressed data in single bytes. As flash memory arrays have evolved, addressing in words and double words have become possible, often in the same array. The ability to provide these different forms of addressing have complicated the operations of the device command user interface. Recently, flash memory arrays have been devised that use buffering to allow the transfer of large amounts of data even though the array cannot immediately handle that data because of its slower combined erasing and writing speed.
These enhancements increase the complexity of flash disk drive and flash emulator operations.
The basic requirement that flash memory be erased in large blocks further complicates operations that flash disk drives and flash disk emulators must carry out. When data are updated, stale data that cannot be overwritten must be marked invalid, the new data must be written to empty array space, and the address tables must be updated to provide a new physical address. This method of updating causes the data in a file to be written to discontiguous positions. When a sufficient amount of data in a large block becomes invalid, the remaining valid data must be copied to empty array space in some other block, the address tables must be updated, and the block must be erased to recover the array space. In prior art devices, this has required means for determining the status of individual blocks and cells of each device at all times.
The writing of flash EEPROM devices is slower than writing DRAM memory because storing data on the floating gate of a transistor requires substantial voltages and relatively long charging times. Both the writing process and the copy process are thus too long to be competitive with DRAM write times. A write state machine is typically positioned on the chip to assist a device command user interface and is used to conduct write and copy operations so that data is accurately stored without overwriting other data in the array. Moreover, the erase process (a process not required by DRAM or electro-mechanical memory) is typically slow, as long as one-half second for some flash drives. Because of this, the erase process is typically conducted as a background process run by the write state machine or by additional on-chip state machines under control of the flash disk drive firmware or flash disk emulator software operating beneath their respective command user interfaces. Substantial resources have been required to keep track of block status in order to accomplish these operations. The time required to conduct erase operations is such that some flash memory device command user interfaces accepts commands that suspend the erase operation to allow various other operations to occur.
Recently, flash memory arrays have been devised that allow the storage of more than one bit of data in a single memory cell. This has substantially increased the complication of the circuitry required to translate commands and data between the flash memory array and the ATA (flash disk drive) and flash disk emulator interfaces. As will be understood, all of this overhead is expensive and slows the operation of the flash memory array.
The ATA interface hides the complexity of the underlying flash disk drive internal software (firmware). A host system typically employs a single ATA device driver that translates instructions from the disk file system maintained by the operating system such as the boot parameter block/file allocation table ("BPB/FAT") file system in the Microsoft DOS and Windows operating systems. This driver is used by all ATA-compatible devices, both rotating and flash-based. The ATA interface was designed to provide forward and backward compatibility for all ATA devices without requiring software updates to the host system device driver. However, the ATA interface, as presently constituted, eliminates the ability to use the flash memory arrays for many operations for which transistor memory is especially well suited. For example, even though a flash memory array may inherently be accessed as rapidly as dynamic random access memory, direct random access is not possible using the ATA interface because of the translation overhead and because of the manner in which data is stored. Because the cells of flash memory arrays cannot be over-written and consequently store file data in discontiguous positions of the flash array, a data file that is read from a flash memory array must be reassembled in main memory before it can be used. Because memory management of the flash memory array makes it necessary to reconstruct files read from flash storage devices in DRAM memory before use, direct execution of applications has been foreclosed in flash disk drives with an ATA interface.
Even if it were possible to store the portions of an application contiguously in a flash memory device, executing an application directly from a flash memory device would be very difficult. First, the ATA interface does not provide any direct access to the memory array for direct execution of instructions in the access time that a basic flash memory itself provides for read operations. Moreover, there is simply no manner of determining the characteristics of the particular flash memory device with which communication is being attempted so that communications can be carried on directly in terms by which the data in the array may be manipulated.
Because of these problems, flash disk drives have typically been used for long term storage of data where the ability to read and write data rapidly is not crucial.
Currently a flash disk emulator has strengths and weaknesses that contrast with those of an ATA-compatible flash drive. The flash disk emulator consists of a two-layer software driver and a memory card or other flash array. The upper level driver layer is referred to as a flash translation layer ("FTL") driver (PCMCIA specification release date May 1996) while each low level driver ("LLD") is usually designed by an original equipment manufacturer and is unique to the flash memory device and card combination. In addition to supporting disk emulation, the memory card or array can be partitioned in one or more additional regions that can support direct random memory access. Thus, a "plain" flash memory card or flash array allows the host system and its user to take advantage of fast direct access to the flash memory device contents in support of direct code execution.
The disadvantage of current flash disk emulator implementations is the custom nature of the low level driver. A low level driver currently reads a device identifier ("device ID") and refers to a lookup table to determine both a command sequence or algorithm and a set of card and/or device geometry and system interface parameters such as voltage and timing to be used with that device.
Such a driver has no way of determining the characteristics of any particular flash memory device with which it is associated except through the lookup table. Consequently, when a new flash memory device is introduced to the host system, the host cannot recognize the new device identifier and therefore cannot use the new card/device combination. This prevents forward compatibility and creates hardship for the typical flash card user who cannot easily find or implement the new required device driver. Because each low level driver must be written to include the particular disk emulator, each time an enhanced version of a flash memory device appears the low level driver must be rewritten to include the new features that the flash memory device offers. For example, drivers must be rewritten to include larger data words, increased buffer transfer size, and the like.
Furthermore, when a new device driver is being made available for the host system, the software writer faces code size and complexity constraints that may lead to a decision to drop older device algorithms. Hence, the new driver may sacrifice backward compatibility.